 English |
|
|
|
|
|
|
|
| SM320F28335-EP_12 Datasheet, PDF (113/167 Pages) Texas Instruments – Digital Signal Controller (DSC) | |||
| |||
| ◁ |
SM320F28335-EP
www.ti.com
OSCCLK
SYSCLKOUT
Write to PLLCR
SPRS581D â JUNE 2009 â REVISED MAY 2012
OSCCLK * 2
OSCCLK/2
OSCCLK * 4
(Current CPU
Frequency)
(CPU Frequency While PLL is Stabilizing
With the Desired Frequency. This Period
(PLL Lock-up Time, tp) is
131072 OSCCLK Cycles Long.)
(Changed CPU Frequency)
Figure 6-9. Example of Effect of Writing Into PLLCR Register
6.9 General-Purpose Input/Output (GPIO)
6.9.1 GPIO - Output Timing
Table 6-11. General-Purpose Output Switching Characteristics
PARAMETER
MIN
tr(GPO)
tf(GPO)
tfGPO
Rise time, GPIO switching low to high
Fall time, GPIO switching high to low
Toggling frequency, GPO pins
All GPIOs
All GPIOs
MAX
8
8
25
UNIT
ns
ns
MHz
GPIO
tf(GPO)
tr(GPO)
Figure 6-10. General-Purpose Output Timing
Copyright © 2009â2012, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): SM320F28335-EP
Electrical Specifications 113
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese