LMH1983 Datasheet, PDF (6/55 Pages) National Semiconductor (TI) – Generating 44.1 kHz Based highly integrated programmable audio

LMH1983
SNLS309I – APRIL 2010 – REVISED DECEMBER 2014
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7.5 Electrical Characteristics⁽¹⁾
Unless otherwise specified, all limits are specified for T_A = 25°C, V_DD = 3.3 V, R_{L_CLK} = 100 Ω (CLKout differential load).
PARAMETER
TEST CONDITIONS
MIN⁽²⁾ TYP⁽³⁾ MAX⁽²⁾ UNIT
I_DD
Total supply current
I_DD
Total supply current
REFERENCE INPUTS (Hin, Vin, Fin)
Default register settings, no load on logic outputs.
V_DD = 3.465 V
PLL2, PLL3 and PLL4 disabled, no load on logic
outputs. V_DD = 3.465 V
170
212 mA
60
100 mA
V_IL
V_IH
T_AFD
Low input voltage
High input voltage
Auto-format detection time
I_IN = ±10 μA
I_IN = ±10 µA
Time from when reference input first presented to
when detected as indicated by NO_REF going low.
Reference timing must be stable and accurate (no
missing pulses).
0
0.7 V_DD
0.3 V_DD
V
V_DD
V
2
4
Input
Frames
OSCin LOGIC INPUTS
V_IL
Low input voltage
V_IH
High input voltage
I²C INTERFACE (SDA, SCL)
I_IN = ±10 µA
I_IN = ±10 µA
0
0.7 V_DD
0.3 V_DD
V
V_DD
V
V_IL
Low input voltage
V_IH
High input voltage
I_IN
Input current
V_IN between 0.1 V_DD and 0.9 V_DD
I_OL
Low output sink current
V_OL = 0V or 0.4V
STATUS FLAG OUTPUTS (NO_REF, NO_ALIGN,NO_LOCK)
0
0.7 V_DD
−10
0.3 V_DD
V
V_DD
V
+10 μA
1.25
mA
V_OL
Low output voltage
V_OH
High output voltage
FRAME TIMING OUTPUTS
I_OUT = +10 mA
I_OUT = −10 mA
V_DD-0.4V
0.4 V
V
V_OL
Low output voltage
I_OUT = +10 mA
Fout1, Fout2, Fout3⁽⁴⁾
0.4
V_OH
High output voltage
I_OUT = -10mA
Fout1, Fout2, Fout3⁽⁴⁾
V_DD-0.4 V
I_OZ
Output shutdown leakage
current
Output buffer shutdown, pin connected to V_DD or
GND V_DD = 3.465V
VIDEO and AUDIO CLOCK OUTPUTS (CLKout1, CLKout2 and CLKout3)
0.4
10 |μA|
27 MHz TIE deterministic
Jitter
Measured at CLKout1 all other CLKouts shutdown
Measured at CLKout1, other CLKouts output default
PLL
250
fs
250
fs
148.5 MHz TIE
deterministic Jitter
t_DJ
148.35 MHz TIE
deterministic Jitter
Measured at CLKout2 all other CLKouts shutdown
Measured at CLKout2, other CLKouts output default
PLL
Measured at CLKout3 all other CLKouts shutdown
Measured at CLKout3, other CLKouts output default
PLL
8
ps
8
ps
4
ps
4
ps
24.576 MHz TIE
deterministic Jitter
Measured at CLKout4 all other CLKouts shutdown
Measured at CLKout4, other CLKouts output default
PLL
15
ps
15
ps
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. No specification of parametric performance
is indicated in the electrical tables under conditions different than those tested.
(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using
statistical analysis methods.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped
production material.
(4) t_D for FoutX is measured from the positive clock edge of CLKout to the negative edge of FoutX at the 50% levels.
6
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