LMH1983 Datasheet, PDF (18/55 Pages) National Semiconductor (TI) – Generating 44.1 kHz Based highly integrated programmable audio

LMH1983
SNLS309I – APRIL 2010 – REVISED DECEMBER 2014
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Feature Description (continued)
• The differential output swing of the CLKout pins is adjusted through Register 0x3A, Bits [6:4]. A larger value
loaded into Bits [6:4] correspond to an increase in the output swing.
• The common mode output voltage can be adjusted via Register 0x3A, Bits [3:0].
8.3.10 TOF1 Alignment
Each of the four clock outputs has a corresponding Top Of Frame (TOF) output signal. The LMH1983 is
programmed with a video format for each of the three video clocks (CLKout 1-3), and the TOF signal provides a
digital indication when the start of a new frame occurs for that particular format. As an example, if PLL1 is
programmed with a video format corresponding to NTSC, CLK1 is 27 MHz, and TOF1 outputs a pulse once per
frame, or once every 900,900 clock cycles. In its default state, the LMH1983 detects the input reference format
and programs this format as the output format for CLKout1. Therefore, if the input reference is an NTSC
reference, then TOF1 will default to a 29.97 Hz signal.
If the H_IN, V_IN, and F_IN inputs to the LMH1983 are coming from the LMH1981 Sync Separator, then the rising
edge of the F_IN input will come in the middle of a line (between H_IN pulses). The TOF pulse, if aligned, will be a
pulse with a width of 1 x H period and transitions aligned with the leading edges of the H_IN pulses. When set for
zero offset, the TOF pulse will be high during the H period where the F_IN input transitions, as seen in Figure 14.
TOF1
H_IN
F_IN
Figure 14. TOF1 Timing
The alignment between the incoming F_IN and the TOF1 output may be controlled in a number of ways. There are
three different alignment modes in which TOF1 may operate as selected via Register 0x11:
1. 11'b (default): PLL1 never attempts to align.
2. 10'b: PLL1 always forces alignment to F_IN.
3. 00'b: Automatically force alignment to F_IN when they are misaligned.
Misalignment can be defined by the user via Register 0x15. In Register 0x15, a time window is defined to specify
the amount of mismatch permitted between F_IN and TOF1 while still considering them to be aligned. If the input
reference signal has a significant amount of low frequency jitter or wander, it may be possible for the relative
alignment between TOF1 and F_IN to vary over time. Selecting "Always Align" mode may lead to undesirable
timing jumps on the output of CLKout1/TOF1.
Once the device decides that it needs to align TOF1 and F_IN, there are two ways that it can be done. Crash lock
involves simply resetting the counter that keeps track of where the TOF1 output transition happens, resulting in
an instantaneous shift of TOF1 to align with F_IN. Drift lock involves using the second loop in PLL1 and skewing
the VCXO to make the frequency of CLKout1 either speed up or slow down. The VCXO skewing slowly pulls
TOF1 and F_IN into alignment. If a new reference is applied that is not in alignment with TOF1, but the output is
currently in use, it may be better to slew TOF1 into alignment rather than to cause a major disruption in the
timing with a crash lock. The LMH1983 allows the user to select either crash lock or drift lock, controllable via
Register 0x11. The option of crash lock or drift lock is available when the difference in phase is small (Output <
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