LMH1983 Datasheet, PDF (37/55 Pages) National Semiconductor (TI) – Generating 44.1 kHz Based highly integrated programmable audio

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LMH1983
SNLS309I – APRIL 2010 – REVISED DECEMBER 2014
PLLx
(INPUT/OUTPUT)
PLL1 (Input)
PLL2 (Output)
PLL3 (Output)
Table 7. Relevant Auto-Format Detection Codes for Figure 23
FORMAT CODE
0
0
21
DESCRIPTION
525I29.97
525I29.97
1080I29.97
HSync PERIOD
(in 27 MHz CLOCKS)
1716
1716
800.8
To ensure correct auto-detection and CLKout signaling desired in Figure 22 and Figure 23, the following SMBus
register values should be verified or changed from their default values.
Register[Bit(s)]
0x05[5]
0x05[4:3]
0x05[1]
0x07[5:0]
0x08[5:0]
0x11[5:4]
0x11[3:2]
0x12[5:4]
0x13[5:4]
0x14[5:4]
0x34[7:4]
Table 8. SMBus Register Settings for Figure 22
WRITE VALUE
1'b
01'b
1'b
000000'b
001101'b
10'b
01'b
10'b
10'b
10'b
0010'b
COMMENTS
Auto Format Detect enabled
PLL1 operating in Genlock mode
Forces PLL2 = 148.5 MHz and PLL3 = 148.35 MHz
Set PLL2 Output to Format Detection Code 0 (0x00)
Set PLL3 Output to Format Detection Code 13 (0x0D)
Set to always align when misaligned
Drift lock (small misalignment), crash lock (large misalignment)
Set TOF2 to always align when misaligned
Set TOF3 to always align when misaligned
Set AFS_Align_Mode to always align when misaligned
Set PLL4_DIV to divide-by-4 for 24.576 MHz
Register[Bit(s)]
0x05[5]
0x05[4:3]
0x05[1]
0x07[5:0]
0x08[5:0]
0x11[5:4]
0x11[3:2]
0x12[5:4]
0x13[5:4]
0x14[5:4]
0x34[7:4]
Table 9. SMBus Register Settings for Figure 23
WRITE VALUE
1'b
01'b
1'b
000000'b
010101'b
10'b
01'b
10'b
10'b
10'b
0010'b
COMMENTS
Auto Format Detect enabled
PLL1 operating in Genlock mode
Forces PLL2 = 148.5 MHz and PLL3 = 148.35 MHz
Set PLL2 Output to Format Detection Code 0 (0x00)
Set PLL3 Output to Format Detection Code 21 (0x15)
Set to always align when misaligned
Drift lock (small misalignment), crash lock (large misalignment)
Set TOF2 to always align when misaligned
Set TOF3 to always align when misaligned
Set AFS_Align_Mode to always align when misaligned
Set PLL4_DIV to divide-by-4 for 24.576 MHz
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