LMH1983 Datasheet, PDF (21/55 Pages) National Semiconductor (TI) – Generating 44.1 kHz Based highly integrated programmable audio

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LMH1983
SNLS309I – APRIL 2010 – REVISED DECEMBER 2014
Device Functional Modes (continued)
8.4.2 User Defined Formats
There are several registers in the LMH1983 that are loaded automatically based on the format of the reference
that is detected. The LMH1983 allows the user to define a non-standard format and a corresponding set of
values to load into the appropriate registers if that format is detected. In order to identify the format, the
LMH1983 measures the frequency of the Hsync input, counts the number of lines per frame in the format, and
detects if the particular format is interlaced or progressive. The Hsync frequency is measured by counting the
number of 27 MHz clock edges that occur in a period of time equal to 20 horizontal sync times. To implement a
user defined format, the following registers are configured:
• The minimum and maximum permissible count must be set, thereby establishing a window of frequency for
Hsync. Registers 0x51 and 0x52 define the 16-bit value for the low end of the frequency range, while
Registers 0x53 and 0x54 define the high end of the frequency range.
• Registers 0x5A and 0x5B define the number of lines per frame for the format.
• Register 0x5D, Bit 4 indicates whether the user defined format is interlaced or not.
• Register 0x5D, Bit 7 enables the detection of a user-defined format.
• Once the user-defined format is detected, the contents of Registers 0x55 through 0x59 configure PLL1 to lock
to 27MHz, which is then used as the reference for PLL2, PLL3, and PLL4.
Table 2 lists the supported standard timing formats. Table 2 includes the relevant parameters used to configure
the LMH1983 for the input and output formats. Auto-detection of the input is supported for the formats listed in
Table 2. The input format can also be programmed manually by the host via I²C if it is necessary to override the
auto-detection feature.
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