LAN91C111_11 Datasheet, PDF (96/133 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
TXEMPTY INTR
Write Acknowledge Reg. with
TXEMPTY Bit Set
Read TXEMPTY & TX INTR
TXEMPTY = 0
&
TXINT = 0
(Waiting for Completion)
TXEMPTY = X
&
TXINT = 1
(Transmission Failed)
TXEMPTY = 1
&
TXINT = 0
(Everything went through
successfully)
Read Pkt. # Register & Save
Write Address Pointer
Register
Read Status Word from RAM
Update Statistics
Issue "Release" Command
Update Variables
Acknowledge TXINTR
Re-Enable TXENA
Restore Packet Number
Return to ISR
Figure 10.4 TXEMPTY INTR (Assumes Auto Release Option Selected)
Revision 1.92 (06-27-11)
96
DATASHEET
SMSC LAN91C111 REV C