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LAN91C111_11 Datasheet, PDF (79/133 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY | |||
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10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
9.2
clearing and the PHY will return a â1â until ANEG is initiated, writing a â0â does not affect the ANEG
process.
DPLX - Duplex mode
When Auto Negotiation is disabled this bit can be used to manually select the link duplex state. Writing
a â1â to this bit selects full duplex while a â0â selects half duplex.
When Auto-Negotiation is enabled reading or writing this bit has no effect.
COLTST - Collision test
Setting a â1â allows for testing of the MII COL signal. â0â allows normal operation.
Reserved:Reserved, Must be 0 for Proper Operation
Register 1. Status Register
CAP_T4
R
0
CAP_TXF
R
1
CAP_TXH
R
1
CAP_TF
R
1
CAP_TH
R
1
Reserved
R
0
Reserved.
R
0
Reserved
R
0
Reserved
R
0
CAP_SUPR
R
0
ANEG_ACK
R
0
REM_FLT
R, LH
0
CAP_ANEG
R
1
LINK
R, LL
0
JAB
R, LH
0
EXREG
R
1
CAP_T4 - 100BASE-T4 Capable
â1â Indicates 100Base-T4 capable PHY, â0â not capable.
CAP_TXF - 100BASE-TX Full Duplex Capable
â1â Indicates 100Base-X full duplex capable PHY, â0â not capable.
CAP_TXH - 100BASE-TX Half Duplex Capable
â1â Indicates 100Base-X alf duplex capable PHY, â0â not capable.
CAP_TF - 10BASE-T Full Duplex Capable
â1â Indicates 10Mbps full duplex capable PHY, â0â not capable.
CAP_TH - 10BASE-T Half Duplex Capable
â1â Indicates 10Mbps half duplex capable PHY, â0â not capable.
Reserved:Reserved, Must be 0 for Proper Operation.
CAP_SUPR - MI Preamble Suppression Capable
â1â indicates the PHY is able to receive management frames even if not preceded by a preamble. â0â
when it is not able.
SMSC LAN91C111 REV C
79
DATASHEET
Revision 1.92 (06-27-11)
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