LAN91C111_11 Datasheet, PDF (80/133 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
9.3
ANEG_ACK - Auto-Negotiation Acknowledgment
When read as ‘1’ indicate ANEG has been completed and that contents in registers 4,5,6 and 7 are
valid. ‘0’ means ANEG has not completed and contents in registers 4,5,6 and 7 are meaningless. The
PHY returns zero if ANEG is disabled.
REM_FLT- Remote Fault Detect
‘1’ indicates a Remote Fault. Latches the ‘1’ condition and is cleared by reading this register or
resetting the PHY.
CAP_ANEG - AutoNegotiation Capable
Indicates the ability (‘1’) to perform ANEG or not (‘0’).
LINK - Link Status
A ‘1’ indicates a valid Link and a ‘0’ and invalid Link. The ‘0’ condition is latched until this register is
read.
JAB - Jabber Detect
Jabber condition detected when ‘1’ for 10Mbps. ‘1’ latched until this register is read or the PHY is reset.
Always ‘0’ for 100Mbps
EXREG - Extended Capability register
‘1’ Indicates extended registers are implemented
Register 2&3. PHY Identifier Register
These two registers (offsets 2 and 3) provide a 32-bit value unique to the PHY.
REG
2
3
3
3
BITS
15-0
15-10
9-4
3-0
NAME
Company ID
Company ID
Manufacturer's ID
Manufacturer's Revision #
DEFAULT VALUE
0000000000010110
111110
000100
----
R/W
SOFT RESET
R
Retains Original Value
R
Retains Original Value
R
Retains Original Value
R
Retains Original Value
9.4 Register 4. Auto-Negotiation Advertisement Register
NP
ACK
RW
R
0
0
RF
Reserved Reserved Reserved
T4
TX_FDX
RW
RW
RW
RW
RW
RW
0
0
0
0
0
1
Revision 1.92 (06-27-11)
80
DATASHEET
SMSC LAN91C111 REV C