LAN91C111_11 Datasheet, PDF (72/133 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

8.24 Bank 3 - Revision Register
10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
OFFSET
A
NAME
REVISION REGISTER
TYPE
READ ONLY
SYMBOL
REV
HIGH
BYTE
0
0
1
1
0
0
1
1
LOW
BYTE
CHIP
REV
1
0
0
1
0
0
1
0
CHIP - Chip ID. Can be used by software drivers to identify the device used.
REV - Revision ID. Incremented for each revision of a given device.
8.25 Bank 3 - RCV Register
OFFSET
C
NAME
RCV REGISTER
TYPE
READ/WRITE
SYMBOL
RCV
HIGH
BYTE
LOW
BYTE
0
RCV
DISCRD
0
0
0
Reserved Reserved
0
0
Reserved
0
MBO
0
MBO
1
1
0
MBO
1
0
MBO
1
0
MBO
1
RCV DISCRD - Set to discard a packet being received. Will discard packets only in the process of
being received. When set prior to the end of receive packet, bit 4 (RXOVRN) of the interrupt status
register will be set to indicate that the packet was discarded. Otherwise, the packet will be received
normally and bit 0 set (RCVINT) in the interrupt status register. RCV DISCRD is self clearing.
MBO - Must be 1.
Revision 1.92 (06-27-11)
72
DATASHEET
SMSC LAN91C111 REV C