LAN91C111_11 Datasheet, PDF (11/133 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Chapter 3 Block Diagrams
The diagram shown in Figure 3.1, "Basic Functional Block Diagram", describes the device basic
functional blocks. The SMSC LAN91C111 is a single chip solution for embedded designs with minimal
Host and external supporting devices required to implement 10/100 Ethernet connectivity solutions.
The optional Serial EEPROM is used to store information relating to default IO offset parameters as
well as which of the Interrupt line are used by the host.
LAN91C111
ISA,Embedded
Processor
Ethernet
MAC
Internal IEEE 802.3 MII (Media
Independent Interface)
PHY
Core
Transformer
RJ45
TX/RX Buffer (8K)
Serial
EEProm
(Optional)
Minimal LAN91C111
Configuration
Figure 3.1 Basic Functional Block Diagram
SMSC LAN91C111 REV C
11
DATASHEET
Revision 1.92 (06-27-11)