LAN91C111_11 Datasheet, PDF (105/133 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
VLBUS
W/nR
A2-A15
LCLK
M/nIO
nRESET
IRQn
D0-D31
nRDYRTN
nBE0-nBE3
nADS
Delay 1 LCLK
W/nR
A2-A15
LCLK
AEN
RESET
INTR0
D0-D31
nRDYRTN
nBE0-nBE3
nADS
LAN91C111
nCYCLE
nSRDY
nLDEV
nLRDY
O.C.
nLDEV
simulated
O.C.
Figure 12.1 LAN91C111 on VL BUS
HIGH-END ISA OR NON-BURST EISA MACHINES
On ISA machines, the LAN91C111 is accessed as a 16 bit peripheral. The signal connections are listed
in the following table:
Table 12.2 High-End ISA or Non-Burst EISA Machines Signal Connectors
ISA BUS
SIGNAL
A1-A15
AEN
nIORD
LAN91C111
SIGNAL
A1-A15
AEN
nRD
SMSC LAN91C111 REV C
NOTES
Address bus used for I/O space and register decoding.
Qualifies valid I/O decoding - enabled access when low.
I/O Read strobe - asynchronous read accesses. Address is valid before
leading edge.
105
DATASHEET
Revision 1.92 (06-27-11)