LAN91C111_11 Datasheet, PDF (19/133 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Chapter 6 Signal Description Parameters
6.1
This section provides a detailed description of each SMSC LAN91C111 signal. The signals are
arranged in functional groups according to their associated function.
The ‘n’ symbol at the beginning of a signal name indicates that it is an active low signal. When ‘n’ is
not present before the signal name, it indicates an active high signal.
The term “assert” or “assertion” indicates that a signal is active; independent of whether that level is
represented by a high or low voltage. The term negates or negation indicates that a signal is inactive.
The term High-Z means tri-stated.
The term Undefined means the signal could be high, low, tri-stated, or in some in-between level.
Buffer Types
O4
O12
O16
O24
OD16
OD24
I/O4
I/O24
I/OD
I
IS
Iclk
I/O
O/I
**
Output buffer with 2mA source and 4mA sink
Output buffer with 6mA source and 12mA sink
Output buffer with 8mA source and 16mA sink
Output buffer with 12mA source and 24mA sink
Open drain buffer with 16mA sink
Open drain buffer with 24mA sink
Bidirectional buffer with 2mA source and 4mA sink
Bidirectional buffer with 12mA source and 24mA sink
Bidirectional Open drain buffer with 4mA sink
Input buffer
Input buffer with Schmitt Trigger Hysteresis
Clock input buffer
Differential Input
Differential Output
5V tolerant. Input pins are able to accept 5V signals
DC levels and conditions defined in the DC Electrical Characteristics section.
SMSC LAN91C111 REV C
19
DATASHEET
Revision 1.92 (06-27-11)