LAN91C111_11 Datasheet, PDF (86/133 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
9.9 Register 19. Mask - Structure and Bit Definition
MINT
RW
1
MLNKFAIL
RW
1
MLOSSSYN
RW
1
MCWRD
RW
1
MSSD
RW
1
MESD
RW
1
MRPOL
RW
1
MJAB
RW
1
MSPDDT
RW
1
MDPLDT
RW
1
Reserved
RW
0
MINT:
MLNKFAIL:
MLOSSSYN:
MCWRD:
MSSD:
MESD:
MRPOL:
MJAB:
Revision 1.92 (06-27-11)
Reserved
RW
0
Reserved
RW
0
Reserved
RW
0
Reserved
RW
0
Reserved
RW
0
Interrupt Mask
Interrupt Detect
1 = Mask Interrupt
For INT In Register
18
0 = No Mask
Interrupt Mask Link
Fail Detect
1 = Mask Interrupt
For LNKFAIL In
Register 18
0 = No Mask
Interrupt Mask
Descrambler Loss
1 = Mask Interrupt
For LOSSSYNC In
Register 18
of Synchronization
Detect
0 = No Mask
Interrupt Mask
Codeword Error
1 = Mask Interrupt
For CWRD In
Register 18
0 = No Mask
Interrupt Mask Start
Of Stream Error
1 = Mask Interrupt
For SSD In Register
18
0 = No Mask
Interrupt Mask End Of 1 = Mask Interrupt
Stream Error
For ESD In Register
18
0 = No Mask
Interrupt Mask
Reverse Polarity
Detect
1 = Mask Interrupt
For RPOL In
Register 18
0 = No Mask
Interrupt Mask Jabber 1 = Mask Interrupt
Detect
For JAB In Register
18
86
DATASHEET
SMSC LAN91C111 REV C