C517A_99 Datasheet, PDF (201/218 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Power Saving Modes
C517A
9.3 Power Saving Mode Control Registers
The functions of the power saving modes are controlled by bits which are located in the special
function registers PCON which is located at SFR address 87H.
The bits PDE, PDS and IDLE, IDLS located in SFR PCON select the power down mode or the idle
mode, respectively. If the power down mode and the idle mode are set at the same time, power
down takes precedence.
Special Function Register PCON (Address 87H)
Reset Value : 00H
Bit No. MSB
LSB
7
6
5
4
3
2
1
0
87H SMOD PDS IDLS
SD
GF1 GF0 PDE IDLE PCON
The function of the shaded bit is not described in this section.
Symbol
PDS
IDLS
SD
GF1
GF0
PDE
IDLE
Function
Power down start bit
The instruction that sets the PDS flag bit is the last instruction before entering
the power down mode
Idle start bit
The instruction that sets the IDLS flag bit is the last instruction before entering
the idle mode.
Slow down mode bit
When set, the slow down mode is enabled
General purpose flag
General purpose flag
Power down enable bit
When set, starting of the power down is enabled
Idle mode enable bit
When set, starting of the idle mode is enabled
Note :The PDS bit, which controls the software power down mode is forced to logic low whenever
the external PE/SWD pin is held at logic high level.
Semiconductor Group
9-3