C517A_99 Datasheet, PDF (198/218 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Fail Safe Mechanisms
C517A
request. If no reset is applied in this moment the part will start program execution. If an external
reset is active, however, the device will keep the reset state until also the external reset request
disappears.
Furthermore, the status flag OWDS is set if the oscillator watchdog was active. The status flag can
be evaluated by software to detect that a reset was caused by the oscillator watchdog. The flag
OWDS can be set or cleared by software. An external reset request, however, also resets OWDS
(and WDTS).
Special Function Register IP0 (Address A9H)
Reset Value : 00H
MSB
LSB
Bit No. 7
6
5
4
3
2
1
0
A9H OWDS WDTS IP0.5 IP0.4 IP0.3 IP0.2 IP0.1 IP0.0 IP0
The shaded bits are not used for fail save control.
Bit
OWDS
Function
Oscillator Watchdog Timer Status Flag.
Set by hardware when an oscillator watchdog reset occured. Can be
set and cleared by software.
8.2.2 Fast Internal Reset after Power-On
The C517A can use the oscillator watchdog unit for a fast internal reset procedure after power-on.
Normally the members of the 8051 family (e. g. SAB 80C52) enter their default reset state not before
the on-chip oscillator starts. The reason is that the external reset signal must be internally
synchronized and processed in order to bring the device into the correct reset state. Especially if a
crystal is used the start up time of the oscillator is relatively long (typ. 1 ms). During this time period
the pins have an undefined state which could have severe effects e.g. to actuators connected to
port pins.
In the C517A the oscillator watchdog unit avoids this situation. After power-on the oscillator
watchdog’s RC oscillator starts working within a very short start-up time (typ. less than 2
microseconds). In the following the watchdog circuitry detects a failure condition for the on-chip
oscillator because this has not yet started (a failure is always recognized if the watchdog’s RC
oscillator runs faster than the on-chip oscillator). As long as this condition is valid the watchdog uses
the RC oscillator output as clock source for the chip. This allows correct resetting of the part and
brings all ports to the defined state (see also chapter 5 of this manual). The delay time between
power-on and correct reset state is max 34 µs (more details see chapter 5.2).
Semiconductor Group
8-8