C517A_99 Datasheet, PDF (183/218 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Interrupt System
C517A
The compare timer interrupt is generated by bit CTF in register CTCON, which is set by a rollover
in the compare timer. lf a compare timer interrupt is generated, flag CTF can be cleared by software.
The timer 2 compare match set and compare match clear interrupt is generated by bits ICS
and ICR in register CTCON. These flags are set by a match in registers COMSET and COMCLR,
when enabled. As long as the match condition is valid the request flags can’t be reset (neither by
hardware nor software).
Special Function Register CTCON (Address. E1H)
Reset Value : 0X000000B
MSB
Bit No. 7
6
E1H T2PS1 –
LSB
5
4
3
2
1
0
ICR ICS CTF CLK2 CLK1 CLK0 CTCON
Bit
ICR
ICS
CTF
The shaded bits are not used for interrupt purposes.
Function
Interrupt request flag for compare register COMCLR
ICR is set when a compare match occured. ICR is cleared ba hardware when the
processor vectors to interrupt routine.
Interrupt request flag for compare register COMSET
ICS is set when a compare match occured. ICS is cleared by hardware when the
processor vectors to interrupt routine.
Compare timer overflow flag
CTF is set when the compare timer 1 count rolls over from all ones to the reload
value. When CTF is set, a compare timer interrupt can be generated (if enabled).
CTF is cleared by hardware when the compare timer value is no more equal to the
reload value.
All of these interrupt request bits that generate interrupts can be set or cleared by software, with the
same result as if they had been set or cleared by hardware. That is, interrupts can be generated or
pending interrupts can be cancelled by software. The only exceptions are the request flags IE0 and
lE1. lf the external interrupts 0 and 1 are programmed to be level-activated, IE0 and lE1 are
controlled by the external source via pin INT0 and INT1, respectively. Thus, writing a one to these
bits will not set the request flag IE0 and/or lE1. In this mode, interrupts 0 and 1 can only be
generated by software and by writing a 0 to the corresponding pins INT0 (P3.2) and INT1 (P3.3),
provided that this will not affect any peripheral circuit connected to the pins.
Semiconductor Group
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