C517A_99 Datasheet, PDF (179/218 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Interrupt System
C517A
The interrupt of the serial interface 0 is generated by the request flags RI0 and TI0 in SFR
S0CON. The two request flags of the serial interface are logically OR-ed together. Neither of these
flags is cleared by hardware when the service routine is vectored too. In fact, the service routine of
each interface will normally have to determine whether it was the receive interrupt flag or the
transmission interrupt flag that generated the interrupt, and the bit will have to be cleared by
software.
The interrupt of the serial interface 1 is generated by the request flags RI1 and TI1 in SFR
S1CON. The two request flags of the serial interface are logically OR-ed together. Neither of these
flags is cleared by hardware when the service routine is vectored too. In fact, the service routine of
each interface will normally have to determine whether it was the receive interrupt flag or the
transmission interrupt flag that generated the interrupt, and the bit will have to be cleared by
software.
Special Function Register S0CON (Address 98H)
Special Function Register S1CON (Address 9BH)
Bit No.
98H
MSB
9F_H
9E_H 9D_H
9C_H
9B_H 9A_H
SM0 SM10 SM20 REN0 TB80 RB80
Reset Value : 00H
Reset Value : 0X000000B
LSB
99_H 98_H
TI0 RI0 S0CON
7
9BH SM
6
5
4
3
2
1
0
– SM21 REN1 TB81 RB81 TI1 RI1 S1CON
The shaded bits are not used for interrupt purposes.
Bit
Function
TI0
Serial interface 0 transmitter interrupt flag
Set by hardware at the end of a serial data transmission. Must be cleared by
software.
RI0
Serial interface 0 receiver interrupt flag
Set by hardware if a serial data byte has been received. Must be cleared by
software.
TI1
Serial interface 1 transmitter interrupt flag
Set by hardware at the end of a serial data transmission. Must be cleared by
software.
RI1
Serial interface 1 receiver interrupt flag
Set by hardware if a serial data byte has been received. Must be cleared by
software.
Semiconductor Group
7-9