C517A_99 Datasheet, PDF (102/218 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C517A
can be overwritten at any time. Setting reload value to FFFF_H will make the compare timer always
equal to FFFF_H.
The compare timer has - as any other timer in the C517A - its own interrupt request flag CTF. This
flag is located in register CTCON. CTF is set when the timer count rolls over from all ones to the
reload value. CTF is reset by hardware when the compare timer value is no more equal to the reload
value.
The compare timer overflow interrupt eases e.g. software control of pulse width modulated output
signals. A periodic interrupt service routine caused by an overflow of the compare timer can be used
to load new values in the assigned compare registers and thus change the corresponding PWM
output accordingly. More details about interrupt control are discussed in chapter 7.
6.3.3 Compare Functions of the CCU
The compare function of a timer/register combination can be described as follows. The 16-bit value
stored in a compare or compare/capture register is compared with the contents of the timer register.
lf the count value in the timer register matches the stored value, an appropriate output signal is
generated at a corresponding port pin.
The contents of a compare register can be regarded as ’time stamp’ at which a dedicated output
reacts in a predefined way (either with a positive or negative transition). Variation of this ’time stamp’
somehow changes the wave of a rectangular output signal at a port pin. This may - as a variation
of the duty cycle of a periodic signal - be used for pulse width modulation as well as for a continually
controlled generation of any kind of square wave forms. In the case of the C517A, two compare
modes are implemented to cover a wide range of possible applications.
In the C517A - thanks to the high number of 13 compare registers and two associated timers -
several timer/compare register combinations are selectable. In some of these configurations one of
the two compare modes may be freely selected. Others, however, automatically establish a
compare mode. In the following the two possible modes are generally discussed. This description
will be referred to in later sections where the compare registers are described.
Semiconductor Group
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