C517A_99 Datasheet, PDF (197/218 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Fail Safe Mechanisms
C517A
8.2.1 Description of the Oscillator Watchdog Unit
Figure 8-3 shows the block diagram of the oscillator watchdog unit. It consists of an internal RC
oscillator which provides the reference frequency for the comparison with the frequency of the on-
chip oscillator. It also shows the modifications which have been made for integration of the wake-up
from power down mode capability.
RC
Oscillator
f _RC
3MHz
XTAL1
XTAL2
On-Chip
Oscillator
÷5 ^f1
Frequency ^f 2 ^{< f} 1
Comparator
f₂
Delay
1 ^{Internal Reset}
OWDS
IP0 (A9 _H)
÷2
Internal Clock
MCB03337
Figure 8-3
Functional Block Diagram of the Oscillator Watchdog
The frequency coming from the RC oscillator is divided by 5 and compared to the on-chip oscillator’s
frequency. If the frequency coming from the on-chip oscillator is found lower than the frequency
derived from the RC oscillator the watchdog detects a failure condition (the oscillation at the on-chip
oscillator could stop because of crystal damage etc.). In this case it switches the input of the internal
clock system to the output of the RC oscillator. This means that the part is being clocked even if the
on-chip oscillator has stopped or has not yet started. At the same time the watchdog activates the
internal reset in order to bring the part in its defined reset state. The reset is performed because
clock is available from the RC oscillator. This internal watchdog reset has the same effects as an
externally applied reset signal with the following exceptions: The Watchdog Timer Status flag
WDTS is not reset (the Watchdog 99Timer however is stopped); and bit OWDS is set. This allows
the software to examine error conditions detected by the Watchdog Timer even if meanwhile an
oscillator failure occured.
The oscillator watchdog is able to detect a recovery of the on-chip oscillator after a failure. If the
frequency derived from the on-chip oscillator is again higher than the reference the watchdog starts
a final reset sequence which takes typ. 1 ms. Within that time the clock is still supplied by the RC
oscillator and the part is held in reset. This allows a reliable stabilization of the on chip oscillator.
After that, the watchdog toggles the clock supply back to the on-chip oscillator and releases thereset
Semiconductor Group
8-7