K4B1G0446C Datasheet, PDF (60/63 Pages) Samsung semiconductor – 1Gb C-die DDR3 SDRAM Specification

K4B1G04(08/16)46C
1Gb DDR3 SDRAM
Note :Clock and Strobe are drawn on a different time scale.
tIS
tIH
CK
tIS tIH
CK
DQS
DQS
V_DDQ
tDS tDH
V_IH(ac) min
VREF to ac
region
V_IH(dc) min
V_REF(dc)
V_IL(dc) max
nominal slew
rate
V_IL(ac) max
V_SS
tVAC
tDS tDH
tVAC
nominal
slew rate
VREF to ac
region
Delta TF
Setup Slew Rate= ^VREF(dc) ^{- Vil(ac)max}
Falling Signal
Delta TF
Delta TR
Setup Slew Rate
Rising Signal ⁼
Vih(ac)min - V_REF(dc)
Delta TR
Figure 27 - Illustration of nominal slew rate and tVAC for setup time tDS (for DQ with respect to strobe) and tIS
(for ADD/CMD with respect to clock).
Page 60 of 63
Rev. 1.0 June 2007