K4B1G0446C Datasheet, PDF (18/63 Pages) Samsung semiconductor – 1Gb C-die DDR3 SDRAM Specification

K4B1G04(08/16)46C
1Gb DDR3 SDRAM
8.3 AC and DC logic input levels for Differential Signals
[ Table 10 ] Differential DC and AC input levels
Symbol
Parameter
VIHdiff
VILdiff
Differential input logic high
Differential input logic low
Note :
1. Refer to "Overshoot and Undershoot specifications" on page 23.
DDR3-800/1066/1333
Min
Max
+ 200
-
-
- 200
Unit
Notes
mV
1
8.4 Differential Input Cross Point Voltage
To guarantee tight setup and hold times as well as output skew parameters with respect to clock and strobe, each cross point voltage of differential input
signals (CK, CK and DQS, DQS) must meet the requirements in below table. The differential input cross point voltage VIX is measured from the actual
cross point of true and complement signal to the midlevel between of VDD and VSS.
VDD
CK, DQS
V_IX
V_IX
V_IX
VDD/2
Figure 4. Vix Definition
CK, DQS
VSS
[ Table 11 ] Cross point voltage for differential input signals (CK, DQS)
Symbol
VIX
Parameter
Differential input Cross point voltage relative to VDD/2
DDR3-800/1066/1333/1600
Min
Max
-150
150
Unit Notes
mV
Page 18 of 63
Rev. 1.0 June 2007