K4B1G0446C Datasheet, PDF (12/63 Pages) Samsung semiconductor – 1Gb C-die DDR3 SDRAM Specification

K4B1G04(08/16)46C
5.0 DDR3 SDRAM Addressing
512Mb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
BC switch on the fly
Page size ^*1
128Mb x4
8
BA0 - BA2
A10/AP
A0 - A12
A0 - A9,A11
A12/BC
1 KB
64Mb x 8
8
BA0 - BA2
A10/AP
A0 - A12
A0 - A9
A12/BC
1 KB
* Reference Information : The following tables are address mapping information for other densitites
1Gb DDR3 SDRAM
32Mb x16
8
BA0 - BA2
A10/AP
A0 - A11
A0 - A9
A12/BC
2 KB
1Gb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
BC switch on the fly
Page size ^*1
256Mb x4
8
BA0 - BA2
A10/AP
A0 - A13
A0 - A9,A11
A12/BC
1 KB
128Mb x 8
8
BA0 - BA2
A10/AP
A0 - A13
A0 - A9
A12/BC
1 KB
64Mb x16
8
BA0 - BA2
A10/AP
A0 - A12
A0 - A9
A12/BC
2 KB
2Gb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
BC switch on the fly
Page size
512Mb x4
8
BA0 - BA2
A10/AP
A0 - A14
A0 - A9,A11
A12/BC
1 KB
256Mb x 8
8
BA0 - BA2
A10/AP
A0 - A14
A0 - A9
A12/BC
1 KB
128Mb x16
8
BA0 - BA2
A10/AP
A0 - A13
A0 - A9
A12/BC
2 KB
4Gb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
BC switch on the fly
Page size
1Gb x4
8
BA0 - BA2
A10/AP
A0 - A15
A0 - A9,A11
A12/BC
1 KB
512Mb x 8
8
BA0 - BA2
A10/AP
A0 - A15
A0 - A9
A12/BC
1 KB
256Mb x16
8
BA0 - BA2
A10/AP
A0 - A14
A0 - A9
A12/BC
2 KB
Page 12 of 63
Rev. 1.0 June 2007