K4B1G0446C Datasheet, PDF (13/63 Pages) Samsung semiconductor – 1Gb C-die DDR3 SDRAM Specification

K4B1G04(08/16)46C
1Gb DDR3 SDRAM
8Gb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
BC switch on the fly
Page size
2Gb x4
8
BA0 - BA2
A10/AP
A0 - A15
A0 - A9,A11,A13
A12/BC
2 KB
1Gb x 8
8
BA0 - BA2
A10/AP
A0 - A15
A0 - A9,A11
A12/BC
2 KB
512Mb x16
8
BA0 - BA2
A10/AP
A0 - A15
A0 - A9
A12/BC
2 KB
Note 1 : Page size is the number of bytes of data delivered from the array to the internal sense amplifiers when an ACTIVE command is registered.
Page size is per bank, calculated as follows:
page size = 2 ^COLBITS * ORG ³ 8
where, COLBITS = the number of column address bits, ORG = the number of I/O (DQ) bits
Page 13 of 63
Rev. 1.0 June 2007