K4B1G0446C Datasheet, PDF (16/63 Pages) Samsung semiconductor – 1Gb C-die DDR3 SDRAM Specification

K4B1G04(08/16)46C
1Gb DDR3 SDRAM
8.2 Differential swing requirement for differntial signals
Figure 2 : Definition of differntial ac-swing and "time above ac level tDVAC
tDVAC
VIHdiff(ac) min
VIHdiff min
VIHdiff(dc) min
0.0
VIHdiff(ac) max
VIHdiff max
VIHdiff(dc) max
differential
voltage
time
half cycle
time
CK - CK
DQS - DQS
tDVAC
[ Table 8 ] Differential swing requirement for clock (CK - CK) and strobe (DQS - DQS)
Symbol
Parameter
DDR3-800 & 1066 & 1033 & 1600
min
max
unit
Note
VIHdiff
differential input high
+0.2
note 3
V
1
VILdiff
differential input low
note 3
-0.2
V
1
VIHdiff(ac)
differential input high ac
2 x (VIH(ac)-Vref)
note 3
V
2
VIHdiff(ac)
differential input low ac
note 3
2 x (Vref - VIL(ac))
V
2
Notes:
1. used to define a differential signal slew-rate.
2. for CK - CK use VIH/VIL(ac) of ADD/CMD and VREFCA; for DQS - DQS, DQSL - DQSL, DQSU - DQSU use VIH/VIL(ac) of DQs and VREFDQ; if a
reduced ac-high or ac-low level is used for a signal group, then the reduced level applies also here.
3. these values are not defined, however they single-ended signals CK, CK, DQS, DQS, DQSL, DQSL, DQSU, DQSU need to be within the respective
limits (VIH(dc) max, VIL(dc)min) for single-ended signals as well as the limitations for overshoot and undershoot.
[ Table 9 ] Allowed time before ringback (tDVAC) for CLK - CLK and DQS - DQS.
Slew Rate [V/ns]
tDVAC [ps] @ |VIH/Ldiff(ac)| = 350mV
min
max
> 4.0
75
-
4.0
57
-
3.0
50
-
2.0
38
-
1.8
34
-
1.6
29
-
1.4
22
-
1.2
13
-
1.0
0
-
< 1.0
0
-
tDVAC [ps] @ |VIH/Ldiff(ac)| = 300mV
min
max
175
-
170
-
167
-
163
-
162
-
161
-
159
-
155
-
150
-
150
-
Page 16 of 63
Rev. 1.0 June 2007