English
Language : 

K4B1G0446C Datasheet, PDF (49/63 Pages) Samsung semiconductor – 1Gb C-die DDR3 SDRAM Specification
◁
K4B1G04(08/16)46C
1Gb DDR3 SDRAM
[ Table 51 ] Timing Parameters by Speed Bin (Cont.)
Speed
Parameter
Command and Address Timing
DLL locking time
Symbol
tDLLK
internal READ Command to PRECHARGE Command delay
tRTP
Delay from start of internal write transaction to internal read
command
WRITE recovery time
Mode Register Set command cycle time
tWTR
tWR
tMRD
Mode Register Set command update delay
tMOD
CAS# to CAS# command delay
Auto precharge write recovery + precharge time
Multi-Purpose Register Recovery Time
ACTIVE to PRECHARGE command period
tCCD
tDAL(min)
tMPRR
tRAS
ACTIVE to ACTIVE command period for 1KB page size
tRRD
ACTIVE to ACTIVE command period for 2KB page size
Four activate window for 1KB page size
Four activate window for 2KB page size
Command and Address setup time to CK, CK referenced to
Vih(ac) / Vil(ac) levels
Command and Address hold time from CK, CK referenced to
Vih(ac) / Vil(ac) levels
Refresh Timing
512Mb REFRESH to REFRESH OR REFRESH to ACTIVE
command interval
1Gb REFRESH to REFRESH OR REFRESH to ACTIVE
command interval
2Gb REFRESH to REFRESH OR REFRESH to ACTIVE
command interval
4Gb REFRESH to REFRESH OR REFRESH to ACTIVE
command interval
8Gb REFRESH to REFRESH OR REFRESH to ACTIVE
command interval
Average periodic refresh interval (0°C ≤ TCASE ≤ 85 °C)
Average periodic refresh interval (85°C ≤ TCASE ≤ 95 °C)
Calibration Timing
Power-up and RESET calibration time
Normal operation Full calibration time
Normal operation short calibration time
Reset Timing
Exit Reset from CKE HIGH to a valid command
Self Refresh Timing
Exit Self Refresh to commands not requiring a locked DLL
Exit Self Refresh to commands requiring a locked DLL
Minimum CKE low width for Self refresh entry to exit timing
Valid Clock Requirement after Self Refresh Entry (SRE)
Valid Clock Requirement before Self Refresh Exit (SRX)
tRRD
tFAW
tFAW
tIS(base)
tIH(base)
tRFC
tRFC
tRFC
tRFC
tRFC
tREFI
tREFI
tZQinitI
tZQoper
tZQCS
tXPR
tXS
tXSDLL
tCKESR
tCKSRE
tCKSRX
DDR3-800
MIN
MAX
DDR3-1066
MIN
MAX
DDR3-1333
MIN
MAX
512
max
(4tCK,7.5ns)
max
(4tCK,7.5ns)
15
4
max
(12tCK,15ns)
4
1
37.5
max
(4tCK,10ns)
max
(4tCK,10ns)
40
50
200
275
-
-
-
-
-
-
-
-
70,000
-
-
-
-
-
-
512
-
max
(4tCK,7.5ns)
-
max
(4tCK,7.5ns)
-
15
-
4
-
max
(12tCK,15ns)
-
4
-
WR + roundup (tRP / tCK(AVG))
1
-
37.5
70,000
max
(4tCK,7.5ns)
-
max
(4tCK,10ns)
-
37.5
-
50
-
512
max
(4tCK,7.5ns)
max
(4tCK,7.5ns)
15
4
max
(12tCK,15ns)
4
1
36
max
(4tCK,6ns)
max
(4tCK,7.5ns)
30
45
125
-
65
200
-
140
-
-
-
-
-
-
-
-
70,000
-
-
-
-
-
-
90
-
110
-
160
-
300
-
350
-
7.8
3.9
512
-
256
-
64
-
max(5tCK, tRFC
+ 10ns)
-
max(5tCK,tRFC
+ 10ns)
-
tDLLK(min)
-
tCKE(min) +
1tCK
-
max(5tCK,10ns)
-
max(5tCK,10ns)
-
90
-
110
-
160
-
300
-
350
-
7.8
3.9
512
-
256
-
64
-
max(5tCK, tRFC
+ 10ns)
-
max(5tCK,tRFC
+ 10ns)
-
tDLLK(min)
-
tCKE(min) +
1tCK
-
max(5tCK,10ns)
-
max(5tCK,10ns)
-
90
-
110
-
160
-
300
-
350
-
7.8
3.9
512
-
256
-
64
-
max(5tCK, tRFC
+ 10ns)
-
max(5tCK,tRFC
+ 10ns)
-
tDLLK(min)
-
tCKE(min) +
1tCK
-
max(5tCK,10ns)
-
max(5tCK,10ns)
-
Units
Note
nCK
ns
tCK(avg)
e
e,18
e
nCK
nCK
nCK
ns
e
e
e
ns
e
ns
e
ps
b,16
ps
b,16
ns
ns
ns
ns
ns
us
us
tCK
tCK
tCK
23
tCK
Page 49 of 63
Rev. 1.0 June 2007
 ▷