K4B1G0446C Datasheet, PDF (45/63 Pages) Samsung semiconductor – 1Gb C-die DDR3 SDRAM Specification

K4B1G04(08/16)46C
12.2 Clock Jitter Specification
Parameter
Symbol
Clock period jitter
tJIT(per)
Clock period jitter during DLL lock-
tJIT(per,lck)
ing period
Cycle to cycle clock period jitter
tJIT(cc)
Cycle to cycle clock period jitter
during DLL locking period
tJIT(cc,lck)
Cumulative error across n cycles tERR(nper)
Average high pulse width
tCH(avg)
Average low pulse width
tCL(avg)
Duty cycle jitter
tJIT(duty)
[ Table 46 ] Clock Jitter specification
DDR3-800
min
max
-100
100
-90
90
200
180
TBD
0.47
0.47
-100
TBD
0.53
0.53
100
DDR3-1066
min
max
-90
90
-80
80
180
160
TBD
0.47
0.47
-75
TBD
0.53
0.53
75
1Gb DDR3 SDRAM
DDR3-1333
min
max
-80
80
-70
70
160
140
TBD
0.47
0.47
-60
TBD
0.53
0.53
60
DDR3-1600
min
max
-70
70
-60
60
140
120
TBD
0.47
0.47
-50
TBD
0.53
0.53
50
Units
ps
ps
ps
ps
ps
tCK(avg)
tCK(avg)
ps
Note : The jitter specified is a random jitter meeting a Gaussian distribution. Input clocks violating the min/max values may result in malfunction of the
DDR3 SDRAM device.
Add note for tCH(avg) and tCL(avg)
tCH(avg) is defined as the average high pulse width, as calculated across any consecutive 200 high pulses:
tCL(avg) is defined as the average low pulse width, as calculated across any consecutive 200 low pulses:
N
∑ ^tCHj
j=1
N x tCK(avg) N=200
N
∑ ^tCLj
j=1
N x tCK(avg)
N=200
Add note for tJIT(duty)
tJIT(duty) is defined as the cumulative set of tCH jitter and tCL jitter. tCH jitter is the largest deviation of any single tCH form tCH(avg). tCL jitter is the
largest deviation of any single tCL from tCL(avg)
tJIT(duty) = min/max of {tJIT(CH), tJIT(CL)}, where:
tJIT(CH) = {tCHi-tCH(avg) where i=1 to 200}, tJIT(CL) = {tCLi-tCL(avg) where i=1 to 200},
Add note for tJIT(per), tJIT(per,lck)
tJIT(per) is defined as the largest deviation of any single tCK from tCK(avg). tJIT(per) = min/max of {tCKi-tCK(avg) where i=1 to 200}
tJIT(per) defines the single period jitter when the DLL is already locked.
tJIT(per,lck) uses the same definition for single period jitter, during the DLL locking period only.
tJIT(per) and tJIT(per,lck) are not guaranteed through final production testing
Add note for tJIT(cc), tJIT(cc,lck)
tJIT(cc) is defined as the absolute difference in clock period between two consecutive clock cycles: tJIT(cc) = Max of {tCKi+1-tCKi}
tJIT(cc) defines the cycle to cycle jitter when the DLL is already locked.
tJIT(cc,lck) uses the same definition for cycle to cycle jitter, during the DLL locking period only.
tJIT(cc) and tJIT(cc,lck) are not guaranteed through final production testing
Add note for tERR(nper)
tERR is defined as the cumulative error across n multiple consecutive cycles from tCK(avg). This definition is TBD.
Page 45 of 63
Rev. 1.0 June 2007