K4B1G0446C Datasheet, PDF (40/63 Pages) Samsung semiconductor – 1Gb C-die DDR3 SDRAM Specification

K4B1G04(08/16)46C
1Gb DDR3 SDRAM
[ Table 40 ] IDD Measurement Conditions for IDD6 and IDD6ET
Current
IDD6
Name
Self-Refresh Current Normal Temperature Range
TCASE = 0 .. 85°C
Measurement Condition
Temperature
TCASE = 85°C
Auto Self Refresh(ASR) / MR2 Bit A6
Disabled / "0"
Self Refresh Temperature Range
(SRT) / MR2 Bit A7
Normal / "0"
CKE
LOW
External Clock
OFF; CK and CK at LOW
t_CK
n.a.
t_RC
n.a.
t_RAS
n.a.
t_RCD
n.a.
t_RRD
n.a.
CL
n.a.
AL
n.a.
CS
FLOATING
Command Inputs
(CS, RAS, CAS, WE)
FLOATING
Row, Column Addresses
FLOATING
Bank Addresses
FLOATING
Data I/O
FLOATING
Output Buffer DQ,DQS / MR1 bit A12
Rtt_NOM, Rtt_WR
off / 1
disabled
Burst length
n.a.
Active banks
all during self-refresh actions
Idle banks
all btw. Self-Refresh actions
Precharge Power Down Mode
/ Mode Register Bit 12
n.a.
IDD6ET
Self-Refresh Current Extended Temperature
Range a TCASE = 0 .. 95°C
TCASE = 95°C
Disabled / "0"
Enabled / "1"
LOW
OFF; CK and CK at LOW
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
FLOATING
FLOATING
FLOATING
FLOATING
FLOATING
off / 1
disabled
n.a.
all during self-refresh actions
all btw. Self-Refresh actions
n.a.
Note :
1 .Users should refer to the DRAM supplier datasheet and/or the DIMM SPD to determine if DDR3 SDRAM devices support the following options referred to in this material
[ Table 41 ] IDD6 current definition
Symbol
Parameter/Condition
IDD6
Normal Temperature Range Self-Refresh Current : CKE< 0.2V; external clock off, CK and CK at 0V; Other control and address
inputs are FLOATING; Data Bus inputs are FLOATING, PASR disabled. Applicable for MR2 setting A6=0 and A7=0.
IDD6ET
Extended Temperature Range SElf-Refresh Current: CKE<0.2V; external clock off, CK and CK at 0V; Other control and
address inputs are FLOATING; Data Bus inputs are FLOATING, PASR disabled. Applicable for MR2 settings A6=0 and A7=1.
Page 40 of 63
Rev. 1.0 June 2007