MC68HC05B4 Datasheet, PDF (30/298 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

2.2
Serial RAM loader
2
The ‘load program in RAM and execute’ mode is entered if the following conditions are satisfied
when the reset pin is released to V_DD. The format used is identical to the format used for the
MC68HC805C4. The SEC bit in the options register must be inactive, i.e. set to ‘1’.
– IRQ at 2xV_DD
– TCAP1 at V_DD
– PD3 at V_DD for at least 30 machine cycles after reset
– PD4 at V_SS for at least 30 machine cycles after reset
In the ‘load program in RAM and execute’ routine, user programs are loaded into MCU RAM via
the SCI port and then executed. Data is loaded sequentially, starting at RAM location $0050, until
the last byte is loaded. Program control is then transferred to the RAM program starting at location
$0051. The first byte loaded is the count of the total number of bytes in the program plus the count
byte. The program starts at the second byte in RAM. During the firmware initialization stage, the
SCI is configured for the NRZ data format (idle line, start bit, eight data bits and stop bit). The baud
rate is 9600 with a 4 MHz crystal. A program to convert ASCII S-records to the format required by
the RAM loader is available from Motorola.
If immediate execution is not desired after loading the RAM program, it is possible to hold off
execution. This is accomplished by setting the byte count to a value that is greater than the overall
length of the loaded data. When the last byte is loaded, the firmware will halt operation expecting
additional data to arrive. At this point, the reset switch is placed in the reset position which will reset
the MCU, but keep the RAM program intact. All routines can now be entered from this state,
including the one which will execute the program in RAM (see Section 2.3).
To load a program in the EEPROM, the ‘load program in RAM and execute’ function is also used.
In this instance the process involves two distinct steps. Firstly, the RAM is loaded with a program
which will control the loading of the EEPROM, and when the RAM contents are executed, the MCU
is instructed to load the EEPROM.
The erased state of the EEPROM is $FF.
Figure 2-1 shows the schematic diagram of the circuit required for the serial RAM loader.
MOTOROLA
2-2
MODES OF OPERATION AND PIN DESCRIPTIONS
TPG
MC68HC05B6
Rev. 4