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MC68HC05B4 Datasheet, PDF (259/298 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit | |||
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H.5
Bootstrap mode
Preliminary Oscillator divide-by-two is forced in bootstrap mode.
The 432 bytes of self-check ï¬rmware on the MC68HC05B6 are replaced by 654 bytes of bootstrap
ï¬rmware. A detailed description of the modes of operation within bootstrap mode is given below.
The bootstrap program in mask ROM address locations $0200 to $024F, $03B0 to $3FFF, $7E00
to $7FDD and $7FE0 to $7FEF can be used to program the EPROM and the EEPROM, to check
if the EPROM is erased or to load and execute data in RAM.
After reset, while going to the bootstrap mode, the vector located at address $7FEE and $7FEF
(RESET) is fetched to start execution of the bootstrap program. To place the part in bootstrap
mode, the IRQ pin should be at 2xVDD with the TCAP1 pin âhighâ during transition of the RESET
pin from low to high. The hold time on the IRQ and TCAP1 pins is two clock cycles after the external
RESET pin is brought high.
When the MC68HC705B32 is placed in the bootstrap mode, the bootstrap reset vector will be
Preliminary fetched and the bootstrap ï¬rmware will start to execute. Table H-4 shows the conditions required
to enter each level of bootstrap mode on the rising edge of RESET.
Table H-4 Mode of operation selection
IRQ pin
VSS to VDD
2xVDD
2xVDD
2xVDD
TCAP1 pin PD1 PD2 PD3 PD4
VSS to VDD x x x x
VDD
000x
VDD
1000
VDD
0100
Mode
Single chip
Erased EPROM veriï¬cation
EPROM veriï¬cation; erase EEPROM;
EPROM/EEPROM parallel program/verify
Erased EPROM veriï¬cation;
no EEPROM erase if SEC is zero (parallel mode)
2xVDD
VDD
1
1
0
0
Erased EPROM veriï¬cation; erase EEPROM;
EPROM parallel program/verify (no E2)
2xVDD
VDD
x 1 1 0 Jump to start of RAM ($0051); SEC bit = ACTIVE
Preliminary 2xVDD
VDD
2xVDD
VDD
x = Donât care
0 1 0 1 EPROM and EEPROM veriï¬cation; SEC bit = ACTIVE (parallel mode)
x
x
1
1
Serial RAM load/execute â similar to MC68HC05B6 but can ï¬ll RAM I,
II and III
The bootstrap program will ï¬rst copy part of itself in RAM (except âRAM parallel loadâ), as the
program cannot be executed in ROM during veriï¬cation/programming of the EPROM. It will then
set the TCMP1 output to a logic high level, unlike the MC68HC05B6 which keeps TCMP1 low. This
can be used to distinguish between the two circuits and, in particular, for selection of the VPP level
and current capability.
14
MC68HC05B6
Rev. 4
MC68HC705B32
TPG
MOTOROLA
H-13
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