MC68HC05B4 Datasheet, PDF (237/298 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

Table F-8 DC electrical characteristics for 3.3V operation
(V_DD = 3.3Vdc ± 10%, V_SS = 0Vdc, T_A = T_L to T_H)
Characteristic⁽¹⁾
Symbol Min
Typ ⁽²⁾
Max
Unit
Output voltage
I_LOAD = – 10 µA
V_OH
V_DD – 0.1
—
—
V
I_LOAD = +10 µA
V_OL
—
—
0.1
Output high voltage (I_LOAD = 0.8mA)
PA0–7, PB0–7, PC0–7, TCMP1, TCMP2
Output high voltage (I_LOAD = 1.6mA)
V_OH V_DD – 0.3 V_DD – 0.1 —
V
TDO, SCLK, PLMA, PLMB
V_OH V_DD – 0.3 V_DD – 0.1 —
Output low voltage (I_LOAD = 1.6mA)
PA0–7, PB0–7, PC0–7, TCMP1, TCMP2,
TDO, SCLK, PLMA, PLMB
V_OL
—
0.1
0.4
V
Output low voltage (I_LOAD = 1.6mA)
RESET
V_OL
0.2
0.6
Input high voltage
PA0–7, PB0–7, PC0–7, PD0–7, OSC1,
IRQ, RESET, TCAP1, TCAP2, RDI
V_IH
0.7V_DD
—
V _DD
V
Input low voltage
PA0–7, PB0–7, PC0–7, PD0–7, OSC1, IRQ , V_IL
V_SS
—
0.2V _DD
V
RESET, TCAP1, TCAP2, RDI
Supply current⁽³⁾
RUN (SM = 0) (See Figure 11-1)
RUN (SM = 1) (See Figure 11-2)
WAIT (SM = 0) (See Figure 11-3)
WAIT (SM = 1) (See Figure 11-4)
STOP
I_DD
—
2.0
3
mA
I_DD
—
0.8
1
mA
I_DD
—
1.0
1.5
mA
I_DD
—
0.4
0.5
mA
0 to 70 (standard)
– 40 to 85 (extended)
– 40 to 105 (industrial)
– 40 to 125 (automotive)
High-Z leakage current
I_DD
—
1
10
µA
I_DD
—
—
10
µA
I_DD
—
—
40
µA
I_DD
—
—
60
µA
PA0–7, PB0–7, PC0–7, TDO, RESET , SCLK I_IL
—
±0.2
±1
µA
Input current
Port B and port C pull-down (V_IN =V_IH)
I_RPD
80
µA
Input current (0 to 70)
IRQ, OSC1, TCAP1, TCAP2, RDI,
I_IN
PD0/AN0-PD7/AN7 (channel not selected)
—
±0.2
±1
µA
Input current (– 40 to 125)
IRQ, OSC1, TCAP1, TCAP2, RDI,
I_IN
—
—
±5
µA
PD0/AN0-PD7/AN7 (channel not selected)
Capacitance
Ports (as input or output), RESET, TDO, SCLK C_OUT
—
IRQ, TCAP1, TCAP2, OSC1, RDI
C_IN
—
PD0/AN0–PD7/AN7 (A/D off)
C_IN
—
PD0/AN0–PD7/AN7 (A/D on)
C_IN
—
—
12
pF
—
8
pF
12
—
pF
22
—
pF
(1) All I_DD measurements taken with suitable decoupling capacitors across the power supply to suppress the transient switching
currents inherent in CMOS designs (see Section 2).
(2) Typical values are at mid point of voltage range and at 25°C only.
(3) RUN and WAIT I _DD: measured using an external square-wave clock source (f_OSC = 2.0MHz); all inputs 0.2 V from rail; no
DC loads; maximum load on outputs 50pF (20pF on OSC2).
STOP /WAIT I _DD: all ports configured as inputs; V_IL = 0.2 V and V_IH = V_DD – 0.2 V: STOP I_DD measured with OSC1 = V _DD.
WAIT I_DD is affected linearly by the OSC2 capacitance.
14
MC68HC05B6
Rev. 4
MC68HC705B16N
TPG
MOTOROLA
F-21