MC68HC05B4 Datasheet, PDF (170/298 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

1 (set) – The watchdog will be active during WAIT mode.
0 (clear) – The watchdog system will be disabled during WAIT mode.
PBPD – Port B pull-down resistors
1 (set) –
0 (clear) –
Pull-down resistors are connected to all 8 pins of port B; the
pull-down, R_PD, is active only while the pin is an input.
No pull-down resistors are connected.
PCPD — Port C pull-down resistors
1 (set) –
0 (clear) –
Pull-down resistors are connected to all 8 pins of port C; the
pull-down, R_PD, is active only while the pin is an input.
No pull-down resistors are connected.
The combination of bit 0 and bit 1 allows the option of pull-down resistors on 0, 8 or 16 inputs. This
feature is not available on the MC68HC05B6.
C.5
Bootstrap mode
The 432 bytes of self-check firmware on the MC68HC05B6 are replaced with 496 bytes of
bootstrap firmware. The bootstrap firmware located from $0200 to $02FF and $1F00 to $1FEF can
be used to program the EPROM, to check if the EPROM is erased and to load and execute data
in RAM.
When the MC68HC705B5 is placed in the bootstrap mode, the bootstrap reset vector is fetched
and the bootstrap firmware starts to execute. Table C-2 shows the conditions required to enter
each level of bootstrap mode on the rising edge of RESET. The hold time on the IRQ and TCAP1
pins after the external RESET pin is brought high is two clock cycles.
14
Table C-2 Mode of operation selection
IRQ pin TCAP1 pin PD2 PD3 PD4
Mode
V_SS to V_DD V_SS to V_DD
x
x
x Single chip
+ 9 Volts
V_DD
0
1
0 Erased EPROM verification
+ 9 Volts
V_DD
x
0
0 EPROM parallel bootstrap load
+ 9 Volts
V_DD
x
1
1 EPROM (RAM) serial bootstrap load and execute
+ 9 Volts
V_DD
x
0
1 RAM parallel bootstrap load and execute
x = Don’t care
MOTOROLA
C-8
MC68HC705B5
TPG
MC68HC05B6
Rev. 4