MC68HC05B4 Datasheet, PDF (254/298 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

H.4.1 EPROM read operation
Preliminary ^{The execution of a program in the EPROM address range or a load from the EPROM are both read}
operations. The E6LAT bit in the EPROM/EEPROM control register should be cleared to ‘0’ which
automatically resets the E6PGM bit. In this way the EPROM is read like a normal ROM. Reading
the EPROM with the E6LAT bit set will give data that does not correspond to the actual memory
content. As interrupt vectors are in EPROM, they will not be loaded when E6LAT is set. Similarly,
the bootstrap ROM routines cannot be executed when E6LAT is set. In read mode, the VPP6 pin
must be at the V_DD level. When entering the STOP mode, the EPROM is automatically set to the
read mode.
Note: An erased byte reads as $00.
H.4.2 EPROM program operation
Preliminary ^{Typically, the EPROM will be programmed by the bootstrap routines resident in the on-chip ROM.}
However, the user program can be used to program some EPROM locations if the proper
procedure is followed. In particular, the programming sequence must be running in RAM, as the
EPROM will not be available for code execution while the E6LAT bit is set. The V_PP6 switching must
occur externally after EPGM is set, for example under control of a signal generated on a pin by the
programming routine.
Note:
Unless the part has a window for reprogramming, only the cumulative programming of
bits to logic ‘1’ is possible if multiple programming is made on the same byte.
To allow simultaneous programming of up to sixteen bytes, these bytes must be in the same group
of addresses which share the same most significant address bits; only the four LSBs can change.
14
Preliminary ^{H.4.3 EPROM/EEPROM control register}
EPROM/EEPROM/ECLK control
Address bit 7
$0007
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
0 E6LAT E6PGM ECLK E1ERA E1LAT E1PGM u000 0000
MOTOROLA
H-8
MC68HC705B32
TPG
MC68HC05B6
Rev. 4