MC68HC05B4 Datasheet, PDF (180/298 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

Address
PC5 out
Data
PC6 in
t_CR
t_HO
t_ADR
t_DHR
t_HI max
PD4
t_EXR max
t_ADR max (address to data delay; PC6=PC5)
t_DHR min (data hold time)
t_CR (load cycle time; PC6=PC5)
t_HO (PC5 handshake out delay)
t_HI max (PC6 handshake in, data hold time)
t_EXR max (max delay for transition to be
recognised during this cycle; PC6=PC5
16 machine cycles
4 machine cycles
49 machine cycles
5 machine cycles
10 machine cycles
30 machine cycles
1 machine cycle = 1/(2f₀(Xtal))
Figure C-10 RAM parallel loader timing diagram
14
MOTOROLA
C-18
MC68HC705B5
TPG
MC68HC05B6
Rev. 4