MC68HC05B4 Datasheet, PDF (169/298 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

C.4
Options register (OPTR)
Options (OPTR) ⁽¹⁾
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$1EFE
EPP 0 RTIM RWAT WWAT PBPD PCPD Not affected
(1) This register is implemented in EPROM, therefore reset has no effect on the state of the individual bits.
Note: This register can only be written to while the device is in bootloader mode.
Bit 7 — Factory use only
Warning: This bit is strictly for factory use only and will always read zero to avoid accidental
damage to the device. Any attempt to write to this bit could result in physical damage.
EPP — EPROM protect
This bit protects the contents of the main EPROM against accidental modification; it has no effect
on reading or executing code in the EPROM.
1 (set) – EPROM contents are protected.
0 (clear) – EPROM contents are not protected.
RTIM — Reset time
This bit can modify t_PORL, i.e. the time that the RESET pin is kept low following a power-on reset.
This feature is handled in the ROM part via a mask option.
1 (set) – t_PORL = 16 cycles.
0 (clear) – t_PORL = 4064 cycles.
RWAT — Watchdog after reset
This bit can modify the status of the watchdog counter after reset.
1 (set) – The watchdog will be active immediately following power-on or
external reset (except in bootstrap mode).
0 (clear) – The watchdog system will be disabled after power-on or external
reset.
WWAT — Watchdog during WAIT mode
This bit can modify the status of the watchdog counter during WAIT mode.
14
MC68HC05B6
Rev. 4
MC68HC705B5
TPG
MOTOROLA
C-7