MC68HC05B4 Datasheet, PDF (105/298 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

9
RESETS AND INTERRUPTS
9.1
Resets
The MC68HC05B6 can be reset in three ways: by the initial power-on reset function, by an active
low input to the RESET pin or by a computer operating properly (COP) watchdog reset. Any of
these resets will cause the program to go to its starting address, specified by the contents of
memory locations $1FFE and $1FFF, and cause the interrupt mask bit in the condition code
register to be set.
t_VDDR
V_DD
V_DD threshold (1-2V typical)
t_OXOV
OSC1
t_PORL
t_CYC
Internal
processor clock
RESET
Internal
address bus
Internal
data bus
(Internal power-on reset)
t_RL (or t_DOGL ) _{(External hardware reset)}
New
1FFE 1FFE 1FFE 1FFE 1FFF _PC
Reset sequence
New New Op
PCH PCL code
Program
execution
begins
1FFE 1FFE 1FFE 1FFE
1FFF
New
PC
Reset sequence
New New Op
PCH PCL code
Program
execution
begins
9
Figure 9-1 Reset timing diagram
MC68HC05B6
Rev. 4
RESETS AND INTERRUPTS
TPG
MOTOROLA
9-1