MC68HC05B4 Datasheet, PDF (224/298 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

Table F-3 EEPROM control bits description
E1ERA
0
0
0
1
1
E1LAT E1PGM
0
0
1
0
1
1
1
0
1
1
Description
Read condition
Ready to load address/data for program/erase
Byte programming in progress
Ready for byte erase (load address)
Byte erase in progress
F.4.4 Mask option register
Mask option register (MOR)⁽¹⁾
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$3DFE
RTIM RWAT WWAT PBPD PCPD Not affected
(1) This register is implemented in EPROM; therefore reset has no effect on the individual bits.
RTIM — Reset time
This bit can modify the time t_PORL, where the RESET pin is kept low after a power-on reset.
1 (set) – t_PORL = 16 cycles.
0 (clear) – t_PORL = 4064 cycles.
RWAT — Watchdog after reset
This bit can modify the status of the watchdog counter after reset. Usually, the watchdog system
is disabled after power-on or external reset but when this bit is set, it will be active immediately
after the following resets (except in bootstrap mode).
WWAT — Watchdog during WAIT mode
This bit can modify the status of the watchdog counter in WAIT mode. Normally, the watchdog
system is disabled in WAIT mode but when this bit is set, the watchdog will be active in WAIT mode.
PBPD — Port B pull-down
This bit, when programmed, connects a resistive pull-down on each pin of port B. This pull-down,
R_PD, is active on a given pin only while it is an input.
14
MOTOROLA
F-8
MC68HC705B16N
TPG
MC68HC05B6
Rev. 4