MC68HC05B4 Datasheet, PDF (102/298 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

8.2.3 A/D status/control register (ADSTAT)
A/D status/control (ADSTAT)
Address bit 7 bit 6 bit 5
$0009 COCO ADRC ADON
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
0 CH3 CH2 CH1 CH0 0000 0000
COCO — Conversion complete flag
1 (set)
– COCO is set each time a conversion is complete, allowing the new
result to be read from the A/D result data register ($08). The
converter then starts a new conversion.
0 (clear) – COCO is cleared by reading the result data register or writing to the
status/control register.
Reset clears the COCO flag.
ADRC — A/D RC oscillator control
The ADRC bit allows the user to control the A/D RC oscillator, which is used to provide a
sufficiently high clock rate to the A/D to ensure accuracy when the chip is running at low speeds.
1 (set) – When the ADRC bit is set, the A/D RC oscillator is turned on and, if
ADON is set, the A/D runs from the RC oscillator clock. See Table 8-1.
8
0 (clear) – When the ADRC bit is cleared, the A/D RC oscillator is turned-off
and, if ADON is set, the A/D runs from the CPU clock.
When the A/D RC oscillator is turned on, it takes a time t_ADRC to stabilize (see Table 11-6 and
Table 11-7). During this time A/D conversion results may be inaccurate.
Note: If the MCU bus clock falls below 1MHz, the A/D RC oscillator should be switched on.
Power-on or external reset clears the ADRC bit.
Table 8-1 A/D clock selection
ADRC
0
0
1
1
ADON
0
1
0
1
RC
A/D
oscillator converter
Comments
OFF
OFF A/D switched off.
OFF
ON A/D using CPU clock.
ON
OFF Allows the RC oscillator to stabilize.
ON
ON A/D using RC oscillator clock.
MOTOROLA
8-4
ANALOG TO DIGITAL CONVERTER
TPG
MC68HC05B6
Rev. 4