82443GX Datasheet, PDF (50/128 Pages) Intel Corporation – Intel 440GX AGPset: 82443GX Host Bridge/Controller

Register Description
Bit
29:28
27:26
25:24
23:22
21:20
19
18
17
16
15
14
Description
MECC [7:0] Buffer Strength Control 1.
4 DIMM FET Configuration: This field sets the buffer strength for the MECC[7:0] path that is
connected to DIMM0 and DIMM1. The buffer strength is programmable based upon the
SDRAM ECC load detected in DIMM slots 0 & 1. This path is enabled when FENA is
deasserted (High) by the 82443GX.
4 DIMM non-FET Configuration: The buffer strength is programmable based upon the
SDRAM ECC load detected in all DIMM slots.
00 = 1x
01 = Reserved (Invalid setting)
10 = 2x
11 = 3x
CSB7# Buffer Strength. This field sets the buffer strength for CSB7# pins.
00 = 1x
01 = Reserved (Invalid setting)
10 = 2x
11 = 3x
CSA7# Buffer Strength. This field sets the buffer strength for CSA7# pins.
00 = 1x
01 = Reserved (Invalid setting)
10 = 2x
11 = 3x
CSB6# Buffer Strength. This field sets the buffer strength for CSB6# pins.
00 = 1x
01 = Reserved (Invalid setting)
10 = 2x
11 = 3x
CSA6# Buffer Strength. This field sets the buffer strength for CSA6#pins.
00 = 1x
01 = Reserved (Invalid setting)
10 = 2x
11 = 3x
CSA5#/, CSB5# Buffer Strength. This field sets the buffer strength for the CSA5#, CSB5#
pins.
0 = 1x
1 = 2x
CSA4#, CSB4# Buffer Strength. This field sets the buffer strength for the CSA4#, CSB4# pins.
0 = 1x
1 = 2x
CSA3#, CSB3# Buffer Strength. This field sets the buffer strength for the CSA3#, CSB3# pins.
0 = 1x
1 = 2x
CSA2#, CSB2# Buffer Strength. This field sets the buffer strength for the CSA2#, CSB2# pins.
0 = 1x
1 = 2x
CSA1#, CSB1# Buffer Strength. This field sets the buffer strength for the CSA1#, CSB1# pins.
0 = 1x
1 = 2x
CSA0#, CSB0# Buffer Strength. This field sets the buffer strength for the CSA0#, CSB0# pins.
0 = 1x
1 = 2x
3-26
82443GX Host Bridge Datasheet