82443GX Datasheet, PDF (31/128 Pages) Intel Corporation – Intel 440GX AGPset: 82443GX Host Bridge/Controller

Register Description
3.2.5 Mapping of Configuration Cycles on AGP
From the AGPset configuration perspective, AGP is seen as another PCI bus interface residing on a
Secondary Bus side of the “virtual” PCI-to-PCI bridge referred to as the 82443GX Host- AGP
bridge. On the Primary bus side, the “virtual” PCI-to-PCI bridge is attached to the BUS #0 referred
to in this document as the PCI interface. The “virtual” PCI-to-PCI bridge entity is used to map
Type #1 PCI Bus Configuration cycles on PCI onto Type #0 or Type #1 configuration cycles on the
AGP interface.
Type 1 configuration cycles on PCI that have a BUS-NUMBER that matches the SECONDARY-
BUS-NUMBER of the “virtual” PCI to PCI bridge will be translated into Type 0 configuration
cycles on the AGP interface. Type 1 configuration cycles on PCI that have a BUS-NUMBER that is
behind the “virtual” P2P bridge will be translated into Type 1 configuration cycles on the AGP
interface.
Note: The PCI bus supports a total of 21 devices by mapping bits 15:11 of the CONFADD to the IDSEL
lines on AD[31:11]. For secondary PCI busses (including the AGP bus), only 16 devices are
supported by mapping bits 15:11 of the CONFADD to the IDSEL lines (AD[31:16]).
To prepare for mapping of the configuration cycles on AGP the initialization software will go
through the following sequence:
1. Scan all devices residing on the PCI bus (i.e., Bus #0) using Type 0 configuration accesses.
2. For every device residing at bus #0 which implements PCI-to-PCI bridge functionality, it will
configure the secondary bus of the bridge with the appropriate number and scan further down
the hierarchy. This process will include the configuration of the “virtual” PCI-to-PCI Bridge
within the 82443GX used to map the AGP address space in a software specific manner.
82443GX Host Bridge Datasheet
3-7