TDA5225 Datasheet, PDF (92/176 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5225
Reference
# _Parameter
Symbol Limit Values Unit
min. typ. max.
Test Conditions
Remarks
Digital Inputs/Outputs Characteristics
I1
High level input
voltage
V_{In_High}
0.7*
VDDD
I2
High level input
leakage current
I_{In_High}
I3
Low level input
voltage (except
P_ON pin)
V_{In_Low}
0
I4
Low level input
V_{In_Low_PON} 0
voltage (at P_ON
pin)
I5
Low level input
I_{In_Low}
-5
leakage current
I6
High level output
V_{Out_High1} VDD5V
voltage 1
-0.4
I7
Low level output
V_{Out_Low1}
0
voltage 1
I8
High level output
V_{Out_High2} VDD5V
voltage 2
-0.8
I9
Low level output
V_{Out_Low2}
0
voltage 2
VDD5V V
+0.1
5
µA
0.8
V
0.5
V
µA
VDD5V V
0.4
V
VDD5V V
0.8
V
IOH=-500 µA, static driver
capability;
Normal Pad Mode
(see register PPCFG2
and CMC0)
IOL=500 µA, static driver
capability;
Normal Pad Mode
(see register PPCFG2
and CMC0)
IOH=-4 mA, static driver
capability;
High Power Pad Mode
(see register PPCFG2
and CMC0)
IOL=4 mA, static driver
capability;
High Power Pad Mode
(see register PPCFG2
and CMC0)
Data Sheet
92
V1.0, 2010-02-19