TDA5225 Datasheet, PDF (74/176 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5225
Functional Description
With this definition the Manchester duty cycle is calculated to
MDC_B
=
T----_{1---.-c---h--i--p-}
T_bit
=
-T---^c---^h---ⁱ-^p----+-----^Δ----T--
T_bit
Edge delay Definition
MDC = Duration delayed edge / Symbol period
bit = 1
1
0
0
1
1. chip
2. chip
T_{c hip}
T
b it
MDC < 50% T_f = 0
1
1
0
0
1
ΔT
T_{c hip}
T_r
T_H
T_{b it}
1
1
T_r
T
H
T_{b it}
T_{b it}
MDC > 50% T_r = 0
0
0
1
ΔT
T_{c hip}
T_f
T_H
T_{b it}
T_f
T_H
T_{b it}
T_{b it}
Figure 50 Definition C: Edge delay definition
This definition determinates the duty cycle to be the ratio of the duration of the delayed
high-chip and the ideal symbol period independently of the information bit content. The
position of the high-chip is determined by the delayed rising edge and/or the delayed
falling edge. For ΔT = T_fall -T_rise the Manchester duty cycle is calculated to
MDC_C
=
T----_{d---e---l-a---y--e---d--H----i--g--h---c---h--i--p-}
T_bit
=
T----_{c---h---i-p----+-----}Δ_----T--
T_bit
=
T----_{c---h--i--p----+-----T----f--a--l--l---–----T----r--i--s--e}
T_bit
Independent on the bit content, the same type of edge (rising edge and/or falling edge)
is shifted.
Data Sheet
74
V1.0, 2010-02-19