TDA5225 Datasheet, PDF(112/176 Page) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

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TDA5225 Datasheet, PDF (112/176 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

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TDA5225

Appendix

Table 1 Register Overview (contâd)

Offset Address

B_PLLFRAC0C2

B_PLLFRAC1C2

B_PLLFRAC2C2

B_PLLINTC3

B_PLLFRAC0C3

B_PLLFRAC1C3

B_PLLFRAC2C3

C_IF1

C_WURSSITH1

C_WURSSIBL1

PLL Fractional Division Ratio Register 0 Channel 2 15EH

PLL Fractional Division Ratio Register 1 Channel 2 15FH

PLL Fractional Division Ratio Register 2 Channel 2 160H

PLL MMD Integer Value Register Channel 3

161H

PLL Fractional Division Ratio Register 0 Channel 3 162H

PLL Fractional Division Ratio Register 1 Channel 3 163H

PLL Fractional Division Ratio Register 2 Channel 3 164H

IF1 Register

216H

RSSI Wake-Up Threshold for Channel 1 Register 21BH

RSSI Wake-Up Blocking Level Low Channel 1

21CH

C_WURSSIBH1

RSSI Wake-Up Blocking Level High Channel 1

21DH

C_WURSSITH2

C_WURSSIBL2

RSSI Wake-Up Threshold for Channel 2 Register 21EH

RSSI Wake-Up Blocking Level Low Channel 2

21FH

C_WURSSIBH2

RSSI Wake-Up Blocking Level High Channel 2

220H

C_WURSSITH3

C_WURSSIBL3

RSSI Wake-Up Threshold for Channel 3 Register 221H

RSSI Wake-Up Blocking Level Low Channel 3

222H

C_WURSSIBH3

RSSI Wake-Up Blocking Level High Channel 3

223H

C_WULOT

C_AFCLIMIT

C_AFCAGCD

C_AFCSFCFG

C_AFCK1CFG0

C_AFCK1CFG1

C_AFCK2CFG0

C_AFCK2CFG1

C_PMFUDSF

C_AGCSFCFG

C_AGCCFG0

C_AGCCFG1

C_AGCTHR

C_DIGRXC

C_ISUPFCSEL

C_PDECF

C_PDECSCFSK

Wake-Up on Level Observation Time Register

AFC Limit Configuration Register

AFC/AGC Freeze Delay Register

AFC Start/Freeze Configuration Register

AFC Integrator 1 Gain Register 0

AFC Integrator 1 Gain Register 1

AFC Integrator 2 Gain Register 0

AFC Integrator 2 Gain Register 1

Peak Memory Filter Up-Down Factor Register

AGC Start/Freeze Configuration Register

AGC Configuration Register 0

AGC Configuration Register 1

AGC Threshold Register

Digital Receiver Configuration Register

Image Supression Fc Selection Register

Pre Decimation Factor Register

Pre Decimation Scaling Register FSK Mode

225H

22AH

22BH

22CH

22DH

22EH

22FH

230H

231H

232H

233H

234H

235H

236H

238H

239H

23AH

Page Number

Data Sheet

112

V1.0, 2010-02-19

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