 English |
|
|
|
|
|
|
|
| TDA5225 Datasheet, PDF (147/176 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver | |||
| |||
| ◁ |
Field
Bits
PP2CFG
2:0
Type
w
PPx Port Configuration Register
Description
Port Pin 2 Output Signal Selection
000B CLK_OUT
001B RX_RUN
010B NINT
011B LOW
100B HIGH
101B DATA
110B DATA_MATCHFIL
111B n.u.
Reset: 2H
TDA5225
Appendix
Register Description
PPCFG2
PPx Port Configuration Register
Offset
083H
33+33(
1
Z
33+33(
1
Z
33+33(
1
Z
33+33(
1
Z
33,19
Z
33,19
Z
Reset Value
00H
33,19
Z
33,19
Z
Field
Bits
PP3HPPEN 7
PP2HPPEN 6
PP1HPPEN 5
PP0HPPEN 4
PP3INV
3
Type
w
w
w
w
w
Description
PP3 High Power Pad Enable
0B Normal
1B High Power
Reset: 0H
PP2 High Power Pad Enable
0B Normal
1B High Power
Reset: 0H
PP1 High Power Pad Enable
0B Normal
1B High Power
Reset: 0H
PP0 High Power Pad Enable
0B Normal
1B High Power
Reset: 0H
PP3 Inversion Enable
0B Not Inverted
1B Inverted
Reset: 0H
Data Sheet
147
V1.0, 2010-02-19
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese