TDA5225 Datasheet, PDF (126/176 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5225
Appendix
Register Description
Field
Bits
WURSSIBL3 7:0
Type
w
Description
Wake Up on RSSI Blocking Level LOW for Channel 3
Reset: FF_H
RSSI Wake-Up Blocking Level High Channel 3 Register
A_WURSSIBH3
RSSI Wake-Up Blocking Level High Channel
3 Register
Offset
023_H

:8566,%+
Z
Reset Value
00_H

Field
Bits
WURSSIBH3 7:0
Type
w
Description
Wake Up on RSSI Blocking Level HIGH for Channel 3
Reset: 00_H
Wake-up on Level Observation Time Register
A_WULOT
Wake-up on Level Observation Time Register
Offset
025_H



:8/2736
Z
:8/27
Z
Field
Bits
WULOTPS 7:5
Type
w
Description
Wake-Up Level Observation Time PreScaler
000_B 4
001_B 8
010_B 16
011_B 32
100_B 64
101_B 128
110_B 256
111_B 512
Reset: 0_H
Data Sheet
126
Reset Value
00_H

V1.0, 2010-02-19