TDA5225 Datasheet, PDF (171/176 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5225
Appendix
Register Description
Field
Bits
ADCRESL
1:0
Type
r
Description
ADC Result Value ADCRES(9:0) = ADCRESH(7:0) & ADCRESL(1:0)
The 2 LSBs of the ADC result are captured when the SFR register
ADCRESH is readout.
Reset: 0_H
VCO Autocalibration Result Readout Register
VACRES
VCO Autocalibration Result Readout
Register


8186('

Offset
0B0_H


5HV
9$&5(6
U
Reset Value
00_H

Field
Bits
UNUSED
7:5
VACRES
3:0
Type
-
r
AFC Offset Read Register
Description
UNUSED
Reset: 0_H
VCO Autocalibration Result
Returns the VCO range selected by VCO Autocalibration
Reset: 0_H
AFCOFFSET
AFC Offset Read Register

Offset
0B1_H
$)&2))6
U
Reset Value
00_H

Field
Bits
AFCOFFS
7:0
Data Sheet
Type
r
Description
Readout of the Frequency Offset found by AFC (AFC loop filter
output).
Value is in signed representation.
Frequency resolution is 2.68 kHz/digit
Output can be limited by x_AFCLIMIT register
Update rate is 548 kHz
Reset: 00_H
171
V1.0, 2010-02-19