TDA5225 Datasheet, PDF(118/176 Page) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

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TDA5225 Datasheet, PDF (118/176 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

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TDA5225

Appendix

Table 2 Register Overview and Reset Value (contâd)

Offset Address

B_AFCLIMIT

B_AFCAGCD

B_AFCSFCFG

B_AFCK1CFG0

B_AFCK1CFG1

B_AFCK2CFG0

B_AFCK2CFG1

B_PMFUDSF

B_AGCSFCFG

B_AGCCFG0

B_AGCCFG1

B_AGCTHR

B_DIGRXC

B_ISUPFCSEL

B_PDECF

B_PDECSCFSK

B_PDECSCASK

B_MFC

B_SRC

B_EXTSLC

B_CHCFG

B_PLLINTC1

B_PLLFRAC0C1

B_PLLFRAC1C1

B_PLLFRAC2C1

B_PLLINTC2

B_PLLFRAC0C2

B_PLLFRAC1C2

B_PLLFRAC2C2

B_PLLINTC3

B_PLLFRAC0C3

B_PLLFRAC1C3

B_PLLFRAC2C3

C_IF1

C_WURSSITH1

C_WURSSIBL1

AFC Limit Configuration Register

12AH

AFC/AGC Freeze Delay Register

12BH

AFC Start/Freeze Configuration Register

12CH

AFC Integrator 1 Gain Register 0

12DH

AFC Integrator 1 Gain Register 1

12EH

AFC Integrator 2 Gain Register 0

12FH

AFC Integrator 2 Gain Register 1

130H

Peak Memory Filter Up-Down Factor Register

131H

AGC Start/Freeze Configuration Register

132H

AGC Configuration Register 0

133H

AGC Configuration Register 1

134H

AGC Threshold Register

135H

Digital Receiver Configuration Register

136H

Image Supression Fc Selection Register

138H

Pre Decimation Factor Register

139H

Pre Decimation Scaling Register FSK Mode

13AH

Pre Decimation Scaling Register ASK Mode

13BH

Matched Filter Control Register

13CH

Sampe Rate Converter NCO Tune

13DH

Externel Data Slicer Configuration

13EH

Channel Configuration Register

158H

PLL MMD Integer Value Register Channel 1

159H

PLL Fractional Division Ratio Register 0 Channel 1 15AH

PLL Fractional Division Ratio Register 1 Channel 1 15BH

PLL Fractional Division Ratio Register 2 Channel 1 15CH

PLL MMD Integer Value Register Channel 2

15DH

PLL Fractional Division Ratio Register 0 Channel 2 15EH

PLL Fractional Division Ratio Register 1 Channel 2 15FH

PLL Fractional Division Ratio Register 2 Channel 2 160H

PLL MMD Integer Value Register Channel 3

161H

PLL Fractional Division Ratio Register 0 Channel 3 162H

PLL Fractional Division Ratio Register 1 Channel 3 163H

PLL Fractional Division Ratio Register 2 Channel 3 164H

IF1 Register

216H

RSSI Wake-Up Threshold for Channel 1 Register 21BH

RSSI Wake-Up Blocking Level Low Channel 1

21CH

C_WURSSIBH1

RSSI Wake-Up Blocking Level High Channel 1

21DH

Reset Value

02H

00H

42H

00H

2BH

03H

08H

40H

07H

00H

20H

07H

00H

02H

44H

93H

F3H

07H

09H

13H

F3H

07H

09H

13H

F3H

07H

09H

20H

00H

FFH

00H

Data Sheet

118

V1.0, 2010-02-19

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