TDA5225 Datasheet, PDF (124/176 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5225
Appendix
Register Description
Field
Bits
WURSSIBH1 7:0
Type
w
Description
Wake Up on RSSI Blocking Level HIGH for Channel 1
Reset: 00_H
RSSI Wake-Up Threshold for Channel 2 Register
A_WURSSITH2
RSSI Wake-Up Threshold for Channel 2
Register

Offset
01E_H
:8566,7+
Z
Reset Value
00_H

Field
Bits
WURSSITH2 7:0
Type
w
Description
Wake Up on RSSI Threshold level for Channel 2
Wake Up Request generated when actual RSSI level is above this
threshold
Reset: 00_H
RSSI Wake-Up Blocking Level Low Channel 2 Register
A_WURSSIBL2
RSSI Wake-Up Blocking Level Low Channel 2
Register
Offset
01F_H

:8566,%/
Z
Reset Value
FF_H

Field
Bits
WURSSIBL2 7:0
Type
w
Description
Wake Up on RSSI Blocking Level LOW for Channel 2
Reset: FF_H
RSSI Wake-Up Blocking Level High Channel 2 Register
Data Sheet
124
V1.0, 2010-02-19