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| TDA5225 Datasheet, PDF (165/176 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver | |||
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TDA5225
Appendix
Register Description
Field
Bits
UNUSED
6:4
AGCMANF 3
Type
-
wc
AFCMANF 2
wc
EXTTOTIM 1
wc
EXTEOM
0
wc
Chip Mode Control Register 1
Description
UNUSED
Reset: 0H
AGC Manual Freeze
When *_AGCSFCFG.AGCFREEZE set to SPI Command, this bit sets the
AGC to freeze mode
0B Inactive
1B Active
Reset: 0H
AFC Manual Freeze
When *_AFCSFCFG.AFCFREEZE set to SPI Command, this bit sets the
AFC to freeze mode
0B Inactive
1B Active
Reset: 0H
Force TOTIM signal
0B no external TOTIM signal forced
1B external TOTIM signal forced
Reset: 0H
Force EOM signal
0B no external EOM signal forced
1B external EOM signal forced
Reset: 0H
CMC1
Chip Mode Control Register 1
Offset
0A5H
8186('
(201&) 727,01
*
&+
Z
Z
8186('
Z
Reset Value
04H
;7$/+30
6
Z
Field
Bits
UNUSED
7:6
EOM2NCFG 5
Type
-
w
Description
UNUSED
Reset: 0H
Continue with next Configuration in Self Polling Mode after EOM
detected in Run Mode Self Polling
0B Continue with Configuration A in Self Polling Mode
1B Continue with next Configuration in Self Polling Mode
Reset: 0H
Data Sheet
165
V1.0, 2010-02-19
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