GDC21D003 Datasheet, PDF (9/77 Pages) Hynix Semiconductor – VSB Receiver

3. Internal Block Diagram
GDC21D003
NADTONDATA
INN
INP
DIN[9:0]
GUP
GDN
DATAPOLP
DATAPOLN
NCHGUP
NCHGDN
DOUT[9:0]
TM[2:0]
VCXO
ADCCLK
CLKFS
I²C BUS
ADC
Input
Selection
DC
Reduction
Polarity
Correction
AGC
Polarity
Decision
Mux
Timing
Recovery
Data
Segment
Sync
Recovery
Field
Sync
Recovery
Clock
Divider
I²C
Interface
Phase Offset Gain
Loop Loop Loop
Comb
Filter
Mux
MSE
&
Comparator
NTSC Rejection
VSB
Mode
Detect
64 Tap
Σ
Forward
Filter
192 Tap
Feedback
Filter
TRST
TMS
TCK
TDI
TDO
JTAG
Deinterleaver/
Viterbi Decoder
Error
Detect
Phase Tracker
Error
Control
Equalizer
4x Clock
4X PLL
SYMCLK
Convolutional
Deinterleaver
Reed-Solomon
Decoder
Data
Derandomizer
Transport
Demultiplexer I/F
Figure 3.1 Functional Block Diagram
VSBCLK
VSBSOP
VSBDVALID NVSBERRFLG
VSBDATA[7:0]
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