GDC21D003 Datasheet, PDF (43/77 Pages) Hynix Semiconductor – VSB Receiver

56
NCHGUP
GDC21D003
(LG)
57
NCHGDN
+3.3V
Analog
S/W
Analog
S/W
GDC21D003
10K
VCXO
Charge Pump
Loop Filter
10.76MHz, 21.52MHz
OPEN
Or
To ADC
(NOTE) - Regarding external VCXO output frequency, VCXOSEL[1:0] should be set as Table 6.2.1.
- In case of using digital input by external ADC, ADCCLK frequency and CLKFS phase should be set as Table 6.2.1.
- Each discrete device value in figure is just recommended value.
- PNP type transistor can be used instead of Analog S/W.
Figure 6.3.11 Timing Recovery I/F Circuit(1)
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